Field of the Invention
The present invention relates to a composition for forming a coating type BPSG film usable in a process for producing a semiconductor device etc., a substrate formed a film by said composition, and a patterning process using said composition.
Description of the Related Art
In the 1980s, exposure light whose source is g-beam (436 nm) or i-beam (365 nm) of a mercury lamp was commonly used for resist patterning. To achieve a further micro resist pattern, a method for making exposure wavelength shorter has been regarded as more effective means. In the 1990s, 64 MB (work size: 0.25 μm or less) dynamic random access memory (DRAM) were mass produced, in which short-wavelength KrF excimer laser (248 nm) were employed as an exposure source instead of the i-beam (365 nm).
However, the production of DRAMs with an integration degree of 256 MB and 1 GB or more requires finer processing technology (work size: 0.2 μm or less), and needs a light source of shorter wavelength. Amid this technological need, the introduction of photolithography using ArF excimer laser (193 nm) has been seriously studied since about a decade ago. According to initial strategy, ArF lithography was going to be introduced in conjunction with the production of 180 nm-node devices, but a conventional KrF excimer lithography was continuously used until 130 nm-node device mass production. Therefore, official introduction of ArF lithography started with 90 nm-node device production.
Meanwhile, mass production of 65 nm-node devices are being promoted by combining with lenses whose numerical aperture (NA) was raised to 0.9. Because of advantageous shorter exposure wavelength, F2 lithography with wavelength of 157 nm was regarded as a next promising production technology for subsequent 45 nm-node devices. However, development of F2 lithography was canceled due to several problems such as higher scanner costs from expensive CaF2 single crystals into projection lenses in large volumes, change in the optical system in accordance with introduction of hard pellicles instead of conventional extremely low durable soft pellicles, and reduced etch resistance of a resist film, thereby introducing ArF-immersion lithography. In the ArF-immersion lithography, water with a refractive index of 1.44 is inserted between a projection lens and a wafer by partial fill method, enabling high-speed scanning. Accordingly, 45 nm-node devices are mass produced by using lenses with an NA of 1.3.
Extreme-ultraviolet (EUV) lithography with wavelength of 13.5 nm is regarded as a next promising fine processing technology by using 32 nm-node lithography. Unfortunately, the EUV lithography is prone to numerous technical problems such as needs for higher laser output, higher sensitivity of a resist film, higher resolution, lower line edge roughness (LER), use of defect-free MoSi laminated mask, and lower aberration of a reflective mirror. Development of another promising 32 nm-node device production technology, high-refractive index immersion lithography, was canceled due to low transmission factor of another promising high-refractive index lens (LUAG) and an inability to obtain a target value of a liquid's refractive index at 1.8. Under the circumstances, general-purpose light exposure technology seems to fail to significantly improve the resolution unless a light source wavelength is changed.
Accordingly, development of a fine processing technology for obtaining a work size exceeding a limiting resolution of an existing ArF-immersion exposure technology has been promoted. As a technology thereof, double patterning technology is being proposed. Specifically, the double patterning technology is a method (method (1)) for forming a first photoresist pattern with an interval rate of a line to a space of 1:3 by using first exposure and development, processing an under layer hard mask by dry etching, laying another hard mask thereon, forming a second line pattern at a space portion obtained by the first exposure by using second exposure and development of a photoresist film, processing the hard mask by dry etching, to form the first pattern and the second pattern alternately. By this method, it is possible that forming a line and space pattern whose pitch is half that of an exposure pattern.
Also, there is another method (method (2)) for forming a first photoresist pattern with an interval rate of a line to a space of 3:1 by using first exposure and development, processing an under layer hard mask by dry etching, forming a pattern on a remaining portion of the hard mask by using second exposure by applying a photoresist film on the under layer hard mask, and processing the hard mask by dry etching with the pattern as a mask. In both methods, by processing a hard mask by two dry etching, a pattern whose pitch is half that of an exposure pattern can be formed. Nevertheless, while the method (1) requires formation of a hard mask twice, the method (2) needs one-time hard mask formation, but additional formation of a trench pattern which is more difficult to resolve than a line pattern.
Another method (method (3)) proposed is to form a line pattern on a positive resist film in X direction by using a dipole light, cure a resist pattern, apply a resist composition thereon again, expose a line pattern in Y direction by using a dipole light, and form a hole pattern from a gap of a grid-like line pattern (Non-Patent Document 1). Moreover, a method for halving a pitch by one-time pattern exposure by using spacer technology in which a resist pattern, an organic hard mask or a polysilicon film whose pattern is transferred and is regarded as a core pattern, and the core pattern is removed by using dry etching, after forming a silicon oxide film around the core pattern at a low temperature, is being proposed.
Accordingly, since finer processing is difficult to achieve only by using a resist film present in an upper layer, a finer patterning process cannot readily be introduced without using a hard mask formed in an under layer of a resist film. Under the circumstances, multilayer resist method is known as a method for using a hard mask as a resist under layer film. The method is that a middle layer film (e.g. a silicon-containing resist under layer film), whose etching selectivity is different from a photo resist film (i.e. an upper layer resist film), is formed between the upper layer resist film and a substrate to be processed; a pattern is formed with the upper layer resist film; then the pattern is transferred to the resist under layer film by dry etching using upper layer resist pattern as a dry etching mask; and further the pattern is transferred to the substrate to be processed or a core film of the spacer process by dry etching using the resist under layer film as a dry etching mask.
The present inventor has proposed a composition for forming a silicon-containing resist under layer film as disclosed in Patent Document 1 or Patent Document 2, etc., for a patterning process in a manufacturing process of a semiconductor apparatus which exceeds the limit of resolution of ArF liquid immersion lithography in recent years. However, it has inherently been used in a process exceeding the limit of resolution of the ArF liquid immersion lithography, so that the degree of difficulty is extremely high; thereby it is in fact impossible to pass through the patterning process with the yield of 100%, whereby there are cases where retry of coating the upper layer resist has to be done due to abnormality in coating the upper layer resist, in exposing it, etc. If the above-mentioned double patterning process becomes the mainstream of the patterning process in the future, the degree of difficulty of the patterning process is further heightened, and a ratio of the retrying process is expected to be higher.
The retrying process until now is to remove all the multi-layer resist under layer film by dry etching, or to remove the silicon-containing resist under layer film by a peeling solution containing hydrofluoric acid, etc., after peeling the upper layer resist by a solvent, so that damage to the substrate to be processed is concerned.
On the other hand, in the cutting-edge semiconductor apparatus, technologies such as three-dimensional transistor and through interconnection, etc., have been used to improve properties of the semiconductor apparatus. In a patterning process to be used for forming such a structure in the semiconductor apparatus, patterning by the multilayer resist method has been carried out. In such a patterning, after pattern formation, there are cases where the process for removing the silicon-containing resist under layer film without causing any damage to the pattern is necessary. However, main constitutional elements of the conventional silicon-containing resist under layer film and main constitutional elements of the pattern are both silicon in many cases, so that if one wishes to selectively remove the resist under layer film, constitutional components are similar whereby it is difficult to suppress damage of the pattern even by either of the methods of dry etching or wet etching which uses a hydrofluoric acid type peeling solution.
Further, after forming a structure at the so-called previous process portion of the semiconductor apparatus, there is a process which makes a wiring process easy by flattening the structure before forming a wire on the structure. Previously, a BPSG (boron phosphorus silica glass) film is formed by the CVD method, subsequently the BPSG film is flattened by thermo-fusion with a heat treatment. However, in the CVD method, generation of fine grains, the so-called particles cannot be avoided principally, and a special cleaning process for removing the particles is required so that the process is inefficient.